Update readme

README.md

@@ -7,3 +7,60 @@ A hardware description language. Very much WIP at this time.
 External modules are created in Kicad. For example, you may build some basic logic gates in Kicad. Then, you can use Electroscript to combine the logic gates together into something more complicated, like a binary adder, or even a computer.
 
 See the `example.es` file for some example code.
+
+## Current status
+
+If you feed it this code: (see example.es)
+
+```
+extern module and("and.sch"); # a kicad schematic in the same directory which defines some input/output signals and wires them together in some way
+extern module or("or.sch"); # same thing, but for or
+extern module xor("xor.sch");
+
+# a binary half adder
+module half_adder(input a, input b, output sum, output carryOut)
+{
+	xor(a, b, sum);
+	and(a, b, carryOut);
+}
+
+# a binary full adder
+module full_adder(input a, input b, input carryIn, output sum, output carryOut)
+{
+	signal sum1;
+	signal carry1;
+	signal carry2;
+	
+	half_adder(a, b, sum1, carry1);
+	half_adder(sum1, carryIn, sum, carry2);
+	or(carry1, carry2, carryOut);
+}
+
+# a byte full adder
+# takes in busses(arrays of signals)
+module byte_adder(input A[0:8], input B[0:8], input carryIn, output Sum[0:8], output carryOut)
+{
+	signal Carries[0:7];
+	full_adder(A[0], B[0], carryIn, Sum[0], Carries[0]);
+	full_adder(A[1], B[1], Carries[0], Sum[1], Carries[1]);
+	full_adder(A[2], B[2], Carries[1], Sum[2], Carries[2]);
+	full_adder(A[3], B[3], Carries[2], Sum[3], Carries[3]);
+	full_adder(A[4], B[4], Carries[3], Sum[4], Carries[4]);
+	full_adder(A[5], B[5], Carries[4], Sum[5], Carries[5]);
+	full_adder(A[6], B[6], Carries[5], Sum[6], Carries[6]);
+	full_adder(A[7], B[7], Carries[6], Sum[7], carryOut);
+}
+
+# this is what gets converted into a schematic
+# it's just a re-export of the byte adder.
+module main(input A[0:8], input B[0:8], input cIn, output Sum[0:8], output cOut)
+{
+	byte_adder(A, B, cIn, Sum, cOut);
+}
+```
+
+It will generate this graph:
+
+![](https://git.scd31.com/stephen/electroscript/raw/branch/master/example.png)
+
+Obviously there's still a way to go before it can generate a schematic, but it's coming along! The hard part(parsing/compiling the language) is done, now all that's left is lots of slow and tedious work(parsing the Kicad schematics and generating a new one).