diff --git a/src/main.rs b/src/main.rs
index 5f54fe08362aa8523ca1c0f8bad039fb16e75fce..d87ee617c10314de8f468d2596832e1c8265dfd2 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -128,8 +128,13 @@ mod app {
             .freeze();
         let mut sys_cfg = ctx.device.SYSCFG.constrain();
 
-        // setup 4463 spi
+        // setup our fake reset pin (temporary)
+        let mut reset_pin = gpiob.pb12.into_pull_up_input();
+        reset_pin.make_interrupt_source(&mut sys_cfg);
+        reset_pin.enable_interrupt(&mut ctx.device.EXTI);
+        reset_pin.trigger_on_edge(&mut ctx.device.EXTI, gpio::Edge::Rising);
 
+        // setup 4463 spi
         let mosi = gpioa.pa7.into_alternate().speed(Speed::VeryHigh);
         let miso = gpioa.pa6.into_alternate().speed(Speed::VeryHigh);
         let sclk = gpioa.pa5.into_alternate().speed(Speed::VeryHigh);
@@ -340,6 +345,12 @@ mod app {
         }
     }
 
+    // temporary. Eventually we'll want the pi to be connected directly to the reset pin
+    #[task(binds = EXTI15_10, priority = 5)]
+    fn reset(_: reset::Context) {
+        cortex_m::peripheral::SCB::sys_reset();
+    }
+
     fn handle_incoming_byte<
         T: rtic::Mutex<T = ConstGenericRingBuffer<Packet, BUFFER_LEN>>,
         A: rtic::Mutex<T = TxTransfer>,