From 49f206751d093de018bcc4327024b9aa9c688f6d Mon Sep 17 00:00:00 2001
From: Stephen D <webmaster@scd31.com>
Date: Sat, 8 Jul 2023 15:42:49 -0300
Subject: [PATCH] reset SPI TX DMA on error
---
src/main.rs | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/main.rs b/src/main.rs
index 6c670af..e7c4b11 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -11,12 +11,10 @@ mod packet;
#[rtic::app(device = stm32f4xx_hal::pac, peripherals = true)]
mod app {
- use hal::block;
use hal::dma;
use hal::gpio::{self, Speed};
- use hal::pac::{self, SPI1, TIM5, USART1};
+ use hal::pac::{self, SPI1, TIM5};
use hal::prelude::*;
- use hal::serial::{Config, Event, Serial};
use hal::spi;
use hal::spi::{Mode, Phase, Polarity, Spi};
use hal::timer::Delay;
@@ -170,7 +168,10 @@ mod app {
tx,
tx_buffer,
None,
- dma::config::DmaConfig::default().memory_increment(false),
+ dma::config::DmaConfig::default()
+ .memory_increment(false)
+ .fifo_enable(true)
+ .fifo_error_interrupt(true),
);
pi_tx.start(|_tx| {});
@@ -296,6 +297,11 @@ mod app {
rx.clear_fifo_error_interrupt();
}
+ #[task(binds = DMA1_STREAM4, priority = 2, shared = [pi_tx])]
+ fn pi_spi_tx(mut ctx: pi_spi_tx::Context) {
+ ctx.shared.pi_tx.lock(|tx| tx.clear_fifo_error_interrupt());
+ }
+
#[task(binds = EXTI2, shared = [radio], local = [radio_irq])]
fn radio_irq(mut ctx: radio_irq::Context) {
ctx.shared.radio.lock(|r| r.interrupt()).unwrap();
--
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